Sai Panda Email
Member of Technical Staff @ Mirafra Technologies
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Sai Panda Location
- Bengaluru, KA, IN
Sai Panda Work
- Member of Technical Staff @ (May 2025 - Present)
- Design Verification Engineer II @ Marquee Semiconductor (June 2023 - March 2025)
- Design Verification Engineer I @ (August 2019 - June 2023)
- ASIC Verification Intern @ (October 2018 - April 2019)
Sai Panda Education
- Veer Surendra Sai University Of Technology ( Formerly UCE ), Burla
Master of Technology - MTech (Electronics and Telecommunication Engineering(VLSI SP))
2017-2019
Sai Panda Skills
- Verilog
- System verilog
- Universal Verification Methodology (UVM)
- C++
- AMBA AHB
- AMBA APB
- PCI
- SystemVerilog
- QuestaSim
- RTL Design
- Functional Verification
- RTL Coding
Sai Panda Summary
- Sai Panda, based in Bengaluru, KA, IN, is currently a Member of Technical Staff at Mirafra Technologies. Sai Panda brings experience from previous roles at Marquee Semiconductor, Semikunn Technology Services and PerfectVIPs. Sai Panda holds a 2017 - 2019 Master of Technology - MTech in Electronics and Telecommunication Engineering(VLSI SP) @ Veer Surendra Sai University Of Technology ( Formerly UCE ), Burla. With a robust skill set that includes Verilog, System verilog, Universal Verification Methodology (UVM), C++, AMBA AHB and more. Sai Panda has 1 emails on RocketReach.
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