Ph. D. (Computer engineering, DSP, VLSI, computer arithmetic)
2001-2009
University of Windsor
MASc (Electrical Engineering)
1998-2001
University of Windsor
BASc (Electrical Engineering)
1994-1998
S. Eskritt Skills
FPGA
Digital Signal Processors
ASIC
Integrated Circuit Design
EDA
Algorithms
VHDL
RTL design
SoC
Verilog
Matlab
Xilinx
IC
Electronics
Simulations
VLSI
PHY
Signal Processing
ModelSim
Electrical Engineering
Circuit Design
Python
Hardware Architecture
Computer Arithmetic
DSP
Number Theory
Digital Design
Static Timing Analysis
Altera
Timing Closure
RTL coding
Hardware Design
TCL
Simulation
C
C++
Hardware
DFT
Computer Architecture
Digital Signal Processing
Field-Programmable Gate Arrays (FPGA)
Very-Large-Scale Integration (VLSI)
Python (Programming Language)
Field Programmable Gate Arrays Fpga
IP
Design
Very Large Scale Integration Vlsi
Field Programmable Gate Arrays
Very Large Scale Integration
S. Eskritt Summary
S. Eskritt, based in Calgary, AB, CA, is currently a Staff Engineer at Eideticom. S. Eskritt brings experience from previous roles at PMC-Sierra, Rad3 Communications and University of Calgary. S. Eskritt holds a 2001 - 2009 Ph. D. in Computer engineering, DSP, VLSI, computer arithmetic @ University of Calgary. With a robust skill set that includes FPGA, Digital Signal Processors, ASIC, Integrated Circuit Design, EDA and more. S. Eskritt has 2 emails on RocketReach.
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