Rupesh Patil Email
Design Verification Engineer @ Hewlett Packard Enterprise
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Rupesh Patil Location
- California, United States
Rupesh Patil Work
- Design Verification Engineer @ (March 2024 - Present)
- Staff Enginner, ASIC Development Engineering @ (June 2022 - March 2024)
- Senior Engineer, ASIC Development Engineering @ (February 2019 - June 2022)
- Summer Intern @ Technophilia Systems (May 2015 - July 2015)
Rupesh Patil Education
- San José State University
Master of Science - MS (Electrical and Electronics Engineering)
2017-2018 - Shivaji University
Bachelor of Engineering (B.E.) (Electronics and Telecommunication engineering)
2012-2016
Rupesh Patil Summary
- Rupesh Patil, based in California, United States, is currently a Design Verification Engineer at Hewlett Packard Enterprise. Rupesh Patil brings experience from previous roles at Western Digital and Technophilia Systems. Rupesh Patil holds a 2017 - 2018 Master of Science - MS in Electrical and Electronics Engineering @ San José State University. Rupesh Patil has 2 emails on RocketReach.
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