Roy Carnell Email
Head of Hardware Engineering Six Cbu @ Thales
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Roy Carnell Location
- Redhill, GB
Roy Carnell Work
- Head of Hardware Engineering Six Cbu @ (February 2015 - Present)
- Hardware Function Manager @ (November 2013 - February 2015)
- High Speed Processing Research Engineer @ (November 2008 - November 2013)
- Principal Engineer @ (March 2005 - November 2008)
- Senior Engineer @ (September 2002 - March 2005)
- Engineer @ (August 1997 - September 2002)
Roy Carnell Education
- The University of Reading
Electronc Engineering
1994-1997 - John Ruskin Sixth Form College 1992-1994
Roy Carnell Skills
- FPGA
- Digital Signal Processors
- Hardware Architecture
- Electronics
- System Design
- Systems Engineering
- Altera
- Engineering Management
- PCB design
- Firmware
- Integration
- Electronic Warfare
- Radar
- Aerospace
- Matlab
- VHDL
- Xilinx
- Simulink
- Knowledge Sharing
- Product Line Engineering
- Systems Design
- Leadership
- Resources
- Business Analysis
- Software
- Microsoft Office
- Spa
- Testing
- Customer Service
- Design
- Project Management
- Research
- Hardware
Roy Carnell Summary
- Roy Carnell, based in Redhill, GB, is currently a Head of Hardware Engineering Six Cbu at Thales. Roy Carnell brings experience from previous roles at Thales. Roy Carnell holds a 1994 - 1997 Electronc Engineering @ The University of Reading. With a robust skill set that includes FPGA, Digital Signal Processors, Hardware Architecture, Electronics, System Design and more. Roy Carnell has 1 emails on RocketReach.
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