Rotem Levy Email
IPU Emulation and FPGA Team Manager @ Intel Corporation
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Rotem Levy Location
- Acre, IL
Rotem Levy Work
- 2024 -now IPU Emulation and FPGA Team Manager @
- 2018 -2024 IPU Emulation Arch and U-Arch @
- 2016 -2018 Power Owner of the Smart-NIC ASIC @
- 2014 -2016 Arch, uArch and Tech-Lead for several Smart-NIC ASICs @
- 2012 -2013 Post-Silicon lead for ASIC product @
- 2005 -2011 uArch and Design-Lead of 10G-Lan-Controller ASICs @
- 2002 -2004 Design-Manager of the PHY-Logic team @
- 1999 -2002 H and W manager and Project Manager @ Trellis Photonics LTD
- 1998 -1999 Senior ASIC Designer @ Ultracom Communication LTD
- 1996 -1998 HW Team Leader @ Ornet / Siemens Data Communications
- 1994 -1996 Asic design Team leader @ Ornet / Siemens Data Communications
- 1991 -1993 ASIC Designer @
Rotem Levy Education
- Technion - Israel Institute of Technology 1989-1993
Rotem Levy Skills
- Verilog
- RTL design
- VLSI
- SoC
- ASIC
- Debugging
- System Architecture
- Embedded Systems
- Embedded Software
- System On A Chip Soc
- System on a Chip
Rotem Levy Summary
- Rotem Levy, based in Acre, IL, is currently a IPU Emulation and FPGA Team Manager at Intel Corporation. Rotem Levy brings experience from previous roles at Intel and Intel Corporation. Rotem Levy holds a 1989 - 1993 Technion - Israel Institute of Technology. With a robust skill set that includes Verilog, RTL design, VLSI, SoC, ASIC and more. Rotem Levy has 3 emails on RocketReach.
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