Ronald Nerlich Email
Lead Principal Engineer Digital Design @ Infineon Technologies Dresden GmbH
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Ronald Nerlich Location
- Dresden, SN, DE
Ronald Nerlich Work
- Lead Principal Engineer Digital Design @ (October 2024 - Present)
- Principal Engineer Digital Design @ (February 2021 - Present)
- Senior Level Hardware Design Engineer IP and SOC, DfT and QC Expert @ Texas Instruments (April 2003 - February 2021)
- Digital Design Engineer @ Sican GmbH / sci-works GmbH (Infineon Technologies AG) (May 1997 - March 2003)
Ronald Nerlich Education
- Technische Universität Dresden
Diplom (Elektrotechnik)
1991-1997
Ronald Nerlich Skills
- Automatic Test Pattern Generation (ATPG)
- DFT
- Debugging
- Design
- Embedded Systems
- English
- Field-Programmable Gate Arrays (FPGA)
- Functional Verification
- German
- Hardware Architecture
- Integrated Circuit Design
- Low-power Design
- MSP430
- Mentoring
- Mixed Signal
- Power Management
- SoC
- SystemVerilog
- Testing
- Universal Verification Methodology (UVM)
- VHDL
- Verilog
Ronald Nerlich Summary
- Ronald Nerlich, based in Dresden, SN, DE, is currently a Lead Principal Engineer Digital Design at Infineon Technologies Dresden GmbH. Ronald Nerlich brings experience from previous roles at Infineon Technologies, Texas Instruments and Sican GmbH / sci-works GmbH (Infineon Technologies AG) . Ronald Nerlich holds a 1991 - 1997 Diplom in Elektrotechnik @ Technische Universität Dresden. With a robust skill set that includes Automatic Test Pattern Generation (ATPG), DFT, Debugging, Design, Embedded Systems and more. Ronald Nerlich has 1 emails on RocketReach.
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