Rohan Mallya Email & Phone Number
ASIC and FPGA Design Engineer @ Meta
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Rohan Mallya Location
- California, United States
Rohan Mallya Work
- 2018 -now ASIC and FPGA Design Engineer @
- 2010 -2018 Staff ASIC Design Engineer @
- 2009 -2009 Intern @
Rohan Mallya Education
- North Carolina State University
MS (Computer Engineering (ASIC Design and Verification))
2008-2009 - MS Ramaiah Institute of Technology
BE (Electronic and Communications)
2004-2008 - Delhi Public School, R.K.Puram, New Delhi
High School Diploma
2004-2004
Rohan Mallya Skills
- SystemVerilog
- Verilog
- ModelSim
- RTL design
- Cadence Virtuoso
- SoC
- Logic Design
- FPGA
- TCL
- VHDL
- Static Timing Analysis
- ASIC
- VLSI
- Computer Architecture
- Integrated Circuit Design
- Functional Verification
- Application-Specific Integrated Circuits (ASIC)
- Digital Circuit Design
- High Level Synthesis
- Microarchitecture
- System on a Chip (SoC)
- Perl
- Video Codec
- H.264
- Hevc
- vp9
- Linux
- Catapult C
- System On A Chip Soc
- Application Specific Integrated Circuits Asic
- Design
- Application Specific Integrated Circuits
- System on a Chip
Rohan Mallya Summary
- Rohan Mallya, based in California, United States, is currently a ASIC and FPGA Design Engineer at Meta. Rohan Mallya brings experience from previous roles at Qualcomm. Rohan Mallya holds a 2008 - 2009 MS in Computer Engineering (ASIC Design and Verification) @ North Carolina State University. With a robust skill set that includes SystemVerilog, Verilog, ModelSim, RTL design, Cadence Virtuoso and more. Rohan Mallya has 4 emails and 7 mobile phone numbers on RocketReach.
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