Manager, Electrical Engineering, Neuromodulation, R and D @ (June 2019 - October 2021)
Senior Electrical Engineer @ (April 2017 - May 2019)
Electrical Engineer @ (July 2016 - March 2017)
Hardware Engineer @ (June 2015 - July 2016)
Electrical Engineer @ (January 2012 - June 2015)
IC Design Engineer @ (August 2010 - January 2012)
Research Student @ Nanoscale Integrated Sensors and Circuits Laboratory (September 2008 - July 2010)
Master's Student @ (August 2008 - July 2010)
Teaching Assistant @ (September 2008 - May 2010)
Ritika Agarwal Education
Tufts University
Masters (Electrical Engineering)
2008-2010
National Institute of Technology Karnataka
B. Tech (Electrical Engineering)
2004-2008
Ritika Agarwal Skills
Analog
CMOS
Cadence
Circuit Design
Electrical Engineering
Electronics
IC
Integrated Circuit Design
Integrated Circuits (IC)
Matlab
Mixed Signal
SPICE
Semiconductor Device
Sensors
Simulations
Simulink
Verilog
Design
Integrated Circuits Ic
Integrated Circuits
Ritika Agarwal Summary
Ritika Agarwal, based in California, United States, is currently a Senior Hardware Engineering Manager at Meta. Ritika Agarwal brings experience from previous roles at LivaNova and Apple. Ritika Agarwal holds a 2008 - 2010 Masters in Electrical Engineering @ Tufts University. With a robust skill set that includes Analog, CMOS, Cadence, Circuit Design, Electrical Engineering and more. Ritika Agarwal has 3 emails and 4 mobile phone numbers on RocketReach.
Looking for a different Ritika Agarwal?
Find contact details for 700 million professionals.