Rishit Patel Email & Phone Number

Rishit Patel Skills

• Logic Design
• Cadence Virtuoso
• Signal Integrity
• Computer Architecture
• Linux
• Custom Designersynopsys
• Algorithms
• Field Programmable Gate Arrays Fpga
• Verification and Validation V&V
• C
• System on a Chip Soc
• System Verilog
• Physical Verification
• HSPICE
• Perl
• RTL design
• Matlab
• Microprocessors
• ASIC
• Verilog
• TCP/IP
• TCL
• Cadence Encounter
• Ic Compiler
• Application Specific Integrated Circuits Asic
• FPGA
• SoC
• VHDL
• Power Integrity
• C++
• Ise Design Suite
• Vlsi Testing
• Physical Design
• Research
• Static Timing Analysis
• Unix
• Low Power Design
• Design Compiler
• Digital Circuit Design
• Field Programmable Gate Arrays
• Application Specific Integrated Circuits
• System on a Chip
• Verification and Validation