Ripu Singh Email & Phone Number
PMTS Silicon Design Engineer @ AMD
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Ripu Singh Location
- Austin, TX, US
Ripu Singh Work
- PMTS Silicon Design Engineer @ (August 2024 - Present)
- Senior Staff Engineer @ (August 2020 - August 2024)
- Sr Principal Application Engineer @ (June 2016 - August 2020)
- Principal Application Engineer @ (July 2013 - June 2016)
- Lead Application Engineer @ (December 2010 - June 2013)
- DFT Engineer @ (July 2005 - November 2010)
Ripu Singh Education
- Manipal Institute of Technology
Bachelor of Engineering (Electrical and Electronics)
2001-2005
Ripu Singh Skills
- 1500
- 1687
- Automatic Test Pattern Generation (ATPG)
- DFT
- DFT Architecture
- Fusion Compiler
- Genus
- JTAG
- Logic BIST
- Logic Synthesis
- Modus
- Physical Synthesis
- Scan Insertion
- Tessent
- Test Points
- Test Timing Constraints
- iJTAG
- DRC
- Design
- ATPG
- BIST
- Long Term Customer
- Long Term Customer Relationships
- Automatic Test Pattern Generation Atpg
- Low Power Design
- Design Rule Checking Drc
- Pre Sales
- Debugging
- Automatic Test Pattern Generation
Ripu Singh Summary
- Ripu Singh, based in Austin, TX, US, is currently a PMTS Silicon Design Engineer at AMD. Ripu Singh brings experience from previous roles at Qualcomm and Cadence Design Systems. Ripu Singh holds a 2001 - 2005 Bachelor of Engineering in Electrical and Electronics @ Manipal Institute of Technology. With a robust skill set that includes 1500, 1687, Automatic Test Pattern Generation (ATPG), DFT, DFT Architecture and more. Ripu Singh has 4 emails and 3 mobile phone numbers on RocketReach.
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