Ray Chen's Location

San Jose, CA, US

Ray Chen's Work

  • RFIC Architect and Engineering Management @ Marvell India
  • RFIC Design @ Apple
  • RFIC Design Manager @ Marvell India
  • 2.5 Gsps and 6 Bits Time-Interleaved SAR ADC Design @ SiBEAM
  • 150 Msps and 14 Bits Pipeline-Flash ADC Design @ Linear Technology
  • Intern @ IBM Microelectronics
  • Second Lieutenant @ Department of Defense

Ray Chen's Education

  • Stanford University

    Ph. D. (Electrical Engineering)

    1999 - 2006
  • National Chiao Tung University

    BS (Electronics Engineering)

    1993 - 1997

Ray Chen's Skills

  • Mixed Signal
  • RF circuits
  • Analog Circuit Design
  • Mixed-Signal IC Design
  • Analog
  • RF
  • IC
  • ASIC
  • Semiconductors
  • Signal Processing

Ray Chen's Summary

Ray Chen, based in San Jose, CA, US, is currently a Senior Director - IC Design (CIBU ASIC Head) at TDK InvenSense, bringing experience from previous roles at TDK InvenSense, Marvell Semiconductor and Apple. Ray Chen holds a 1999 - 2006 Ph. D. in Electrical Engineering @ Stanford University. With a robust skill set that includes Mixed Signal, RF circuits, Analog Circuit Design, Mixed-Signal IC Design, Analog and more, Ray Chen contributes valuable insights to the industry. Ray Chen has 3 emails and 1 mobile phone number on RocketReach.

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