Ravinder A Email
Sr. Engineering Manager at Analog Devices US, CA.
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Ravinder A Location
- San Jose, CA, US
Ravinder A Work
- 2022 -now Sr. Engineering Manager at Analog Devices US, CA. @ Analog Devices Inc
- 2020 -now Sr. Engineering Manager @
- 2017 -2020 Director @ Invecas Technologies
- 2011 -2014 General Manager ASIC Engineering @ Aizyc Technology
- 2008 -2011 ASIC Design Manager @
- 2006 -2008 Staff Engineer @
- 2004 -2006 Sr. Design Engineer @
- 2004 -2004 Design Engineer @
- 2001 -2004 ASIC Design Engineer @ QualCore Logic
Ravinder A Education
- Birla Institute of Technology and Science, Pilani
Master of Technology - MTech (Microelectronics)
2018-2020 - Chaitanya Bharathi Institute Of Technology
Bachelor of Engineering - BE (Electronics and Communications)
1998-2001
Ravinder A Skills
- Verilog
- RTL design
- SoC
- FPGA
- VLSI
- SystemVerilog
- ASIC
- Embedded Systems
- Debugging
- ARM
- VHDL
- C
- USB
- PCIe
- Functional Verification
- EDA
- Static Timing Analysis
- Customer Service
- Semiconductors
- Manufacturing
- Testing
- Engineering
- Leadership
Ravinder A Summary
- Ravinder A, based in San Jose, CA, US, is currently a Sr. Engineering Manager at Analog Devices US, CA. at Analog Devices Inc. Ravinder A brings experience from previous roles at Analog Devices India, Invecas Technologies, Aizyc Technology and MosChip Semiconductor Technology Ltd.. Ravinder A holds a 2018 - 2020 Master of Technology - MTech in Microelectronics @ Birla Institute of Technology and Science, Pilani. With a robust skill set that includes Verilog, RTL design, SoC, FPGA, VLSI and more. Ravinder A has 2 emails on RocketReach.
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