If you need more lookups,
subscriptions start at $34 USD/month.
Ravi Setty Location
Santa Clara, CA, US
Ravi Setty Work
System Architect and Technical Lead - MTIA chips @ (October 2023 - Present)
Co-founder and Sr. VP @ Roviero Inc (March 2020 - October 2023)
System Architect Silicon Lead @ (October 2017 - March 2020)
Silicon Architecture Engineer @ (January 2015 - October 2017)
Sr. Principal IC Design Engineer @ (February 2007 - January 2015)
Design Project Lead @ Insilica (January 2006 - January 2007)
Tech Lead and First Line Manager @ (April 2003 - May 2006)
Sr Design Engineer @ (January 2001 - January 2003)
Project lead @ Acorn networks (February 1999 - November 2001)
Sr Design Engineer @ (January 1996 - January 1999)
Ravi Setty Education
Victoria Jubilee Technical Institute
Bachelor of Engineering (Electronics)
1993-1996
Sandur Polytechnic
(Communication, Electronics)
1990-1993
Sandur Polytechnic College
VEERMATA JIJABAI TECHNOLOGICAL INSTITUTE
Ravi Setty Skills
Semiconductor Engineering
Presentations
Interconnect
Interfaces
IO
Project Leadership
Digital Designs
Design Management
DFT
AMBA AHB
AXI
Team-focused
Specifications
Timing
Engineering
VHDL
Power Analysis
RTL design
SoC
Verilog
VLSI
ModelSim
ASIC
Timing Closure
SystemVerilog
Static Timing Analysis
Low-power Design
Circuit Design
PCIe
Power Management
Analog
Primetime
Physical Design
Microprocessors
EDA
Floorplanning
Computer Architecture
Cadence Virtuoso
Debugging
Functional Verification
IC
Integrated Circuit Design
Logic Synthesis
Logic Design
TCL
FPGA
Very-Large-Scale Integration (VLSI)
Field-Programmable Gate Arrays (FPGA)
Application-Specific Integrated Circuits (ASIC)
Field Programmable Gate Arrays Fpga
Troubleshooting
Integrated Circuit
Microsoft Office
Marketing
Application Specific Integrated Circuits Asic
Management
Semiconductors
Design
Low Power Design
Very Large Scale Integration Vlsi
Architecture
Integration
Verification
Application Specific Integrated Circuits
Very Large Scale Integration
Field Programmable Gate Arrays
Ravi Setty Summary
Ravi Setty, based in Santa Clara, CA, US, is currently a System Architect and Technical Lead - MTIA chips at Meta. Ravi Setty brings experience from previous roles at Roviero Inc, Facebook, Intel Corporation and Broadcom Corporation. Ravi Setty holds a 1993 - 1996 Bachelor of Engineering in Electronics @ Victoria Jubilee Technical Institute. With a robust skill set that includes Semiconductor Engineering, Presentations, Interconnect, Interfaces, IO and more. Ravi Setty has 4 emails and 3 mobile phone numbers on RocketReach.
Looking for a different Ravi Setty?
Find contact details for 700 million professionals.