2000 -2005 Design verification lead @ Velio Communications
2000 -2004 verification engineer @ velio
1997 -2000 design verification @
1992 -1998 Senior design engineer @
Ravi Ram Education
San Jose State University
Master Of Science (Electrical Engineering)
PSG College of Technology
Bachelor Of Science (Electrical Engineering)
Campion Higher Secondary School
Ravi Ram Skills
Verification, UVM/OVM, C, Perl, skill, backend layout tool development
SystemVerilog
Embedded Systems
FPGA
Verilog
ASIC
Functional Verification
SoC
SystemC
DDR
UVM
Open Verification Methodology
Simulations
DDR3
C
Mixed Signal
Semiconductors
Debugging
Open Verification
Uvm/Ovm
Backend Layout Tool Development
Perl
Skill
Verification
Ravi Ram Summary
Ravi Ram, based in California, United States, is currently a AMD Fellow, Xilinx, Verification and Methodology at AMD. Ravi Ram brings experience from previous roles at Altera, AMD and Bay Design. Ravi Ram holds a Master Of Science in Electrical Engineering @ San Jose State University. With a robust skill set that includes Verification, UVM/OVM, C, Perl, skill, backend layout tool development, SystemVerilog, Embedded Systems, FPGA, Verilog and more. Ravi Ram has 2 emails and 1 mobile phone numbers on RocketReach.
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