Rany Elsayed Email & Phone Number
Principal Engineer, Director of Xeon and AI Accelerators Thermal and Power and Performance and Binsplit Modeling @ Intel Capital
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Rany Elsayed Location
- Santa Clara, CA, US
Rany Elsayed Work
- Principal Engineer, Director of Xeon and AI Accelerators Thermal and Power and Performance and Binsplit Modeling @ (June 2016 - Present)
- Intel Foundry Technology Integration Manager @ (October 2014 - December 2016)
- Senior Staff Foundry Circuit Technology Integration Engineer @ (October 2011 - October 2014)
- Assistant Professor (on leave) @ Computer Engineering Department, Cairo University (September 2002 - April 2013)
- Nanolithography Pathfinding Staff Engineer @ (January 2008 - October 2011)
- Senior Research Engineer @ (March 2004 - January 2008)
- Graduate Research Assistant @ (August 1999 - March 2004)
Rany Elsayed Education
- Carnegie Mellon University
Doctor of Philosophy (Computer Engineering)
1999-2004 - Cairo University
Masters (Computer Engineering)
1996-1999 - Cairo University
Bachelor of Arts (Computer Engineering)
1991-1996
Rany Elsayed Skills
- VLSI
- SoC
- Verilog
- Semiconductors
- IC
- Computer Architecture
- EDA
- Cadence Virtuoso
- CMOS
- VHDL
- Circuit Design
- Analog Circuit Design
- Perl
- Algorithms
- Characterization
- Integrated Circuits (IC)
- System on a Chip (SoC)
Rany Elsayed Summary
- Rany Elsayed, based in Santa Clara, CA, US, is currently a Principal Engineer, Director of Xeon and AI Accelerators Thermal and Power and Performance and Binsplit Modeling at Intel Corporation. Rany Elsayed brings experience from previous roles at Intel Corporation and Computer Engineering Department, Cairo University. Rany Elsayed holds a 1999 - 2004 Doctor of Philosophy in Computer Engineering @ Carnegie Mellon University. With a robust skill set that includes VLSI, SoC, Verilog, Semiconductors, IC and more. Rany Elsayed has 2 mobile phone numbers on RocketReach.
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