Randall Paul Email & Phone Number
Senior Staff Design Engineer @ Western Digital
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Randall Paul Location
- San Jose, CA, US
Randall Paul Work
- Senior Staff Design Engineer @ (May 2008 - Present)
- Senior High Speed Digital Design Engineer @ (October 2004 - May 2008)
- Design Engineer IV @ (May 2001 - April 2004)
- ASiC Design Engineer @ (November 2000 - May 2001)
- Design Engineer @ Seagate Corporation (September 1998 - November 2000)
- Design Engineer @ Integral Peripherals Corporation (October 1995 - March 1998)
- Design Engineer @ IPT, Incorporated (November 1989 - July 1992)
- Design Engineer @ Unisys Peripherals Group (November 1987 - November 1989)
- Design Engineer @ Helios, Incorporated (June 1987 - November 1987)
Randall Paul Education
- Carnegie Mellon University
B.S (Electrical Engineering)
1983-1987 - Tower Hill School
High School Diploma (General)
1979-1983
Randall Paul Skills
- Low-power Design
- GPS
- GSM
- MEMS
- RFID+
- ARM Cortex-M3
- Signal Integrity
- FPGA
- Circuit Design
- PCB design
- Embedded Software
- USB
- SoC
- ASIC
- PCIe
- Low Power Design
- Arm Cortex M3
Randall Paul Summary
- Randall Paul, based in San Jose, CA, US, is currently a Senior Staff Design Engineer at Western Digital. Randall Paul brings experience from previous roles at Micron Technology, Quantum, Emulex and Seagate Corporation. Randall Paul holds a 1983 - 1987 B.S in Electrical Engineering @ Carnegie Mellon University. With a robust skill set that includes Low-power Design, GPS, GSM, MEMS, RFID+ and more. Randall Paul has 3 emails and 2 mobile phone numbers on RocketReach.
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