Ran Liao Email & Phone Number
Physical Design Engineer @ Apple
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Ran Liao Location
- Cupertino, CA, US
Ran Liao Work
- Physical Design Engineer @ (June 2016 - Present)
- Staff II IC Design Engineer @ (February 2014 - May 2016)
- Research Assistant @ (January 2009 - January 2014)
- Teaching Assistant @ (January 2010 - May 2012)
Ran Liao Education
- Oklahoma State University
Doctor of Philosophy (Ph.D.) (Electrical and Computer Engineering)
2009-2013 - Oklahoma State University
BE (Electronics Science and Technology)
2004-2008
Ran Liao Skills
- Matlab
- Cadence Virtuoso
- ModelSim
- ASIC
- Verilog
- Cadence
- VHDL
- CMOS
- TCL
- Xilinx
- Static Timing Analysis
- Simulations
- SoC
- Spectre
- Physical Design
- RTL Compiler
- DRC and LVS
- EDA
- Cell Library Deisgn
- ELC
- SOC Encounter
- ETS
- NC Verilog
- Perl
- C
- VLSI
- Integrated Circuit Design
- Semiconductors
- RTL Design
- Characterization
- Cadence Spectre
- Application-Specific Integrated Circuits (ASIC)
- Python
- Marketing
- Application Specific Integrated Circuits Asic
Ran Liao Summary
- Ran Liao, based in Cupertino, CA, US, is currently a Physical Design Engineer at Apple. Ran Liao brings experience from previous roles at Broadcom and Oklahoma State University. Ran Liao holds a 2009 - 2013 Doctor of Philosophy (Ph.D.) in Electrical and Computer Engineering @ Oklahoma State University. With a robust skill set that includes Matlab, Cadence Virtuoso, ModelSim, ASIC, Verilog and more. Ran Liao has 2 emails and 3 mobile phone numbers on RocketReach.
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