Ramesh Bitra Email & Phone Number
Principal Engineer @ SiFive
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Ramesh Bitra Location
- Hyderabad, IN
Ramesh Bitra Work
- 2026 -now Principal Engineer @
- 2022 -2026 Senior Staff Engineer @
- 2019 -2022 Staff Engineer @
- 2016 -2019 Pre-silicon verification engineer @
- 2014 -2016 Senior Design Engineer @
- 2012 -2014 Design Verification Engineer @
- 2010 -2012 Embedded Software Engineer @
Ramesh Bitra Education
- Indian Institute of Technology, Bombay
M.Tech (Embedded Systems, Systems and control)
2006-2008 - Andhra University
B.E (Electrical and Electronics Enginneering)
2002-2006 - Nalanda Junior College, Vijayawada
Intermediate (Maths, Physics, Chemistry)
2000-2002
Ramesh Bitra Skills
- UVM
- System Verilog
- Perl Script
- I2C
- Firmware
- Embedded Systems
- VHDL
- Embedded C
- SPI
- Embedded Software
- Device Drivers
- Microcontrollers
- ModelSim
- Xilinx
- JTAG
- Assembly Language
- Verilog
- SystemVerilog
- ARM Architecture
- Functional Verification
- Processors
- Perl
- Axi 4
- Accelarated coherency extenstin
- Semiconductors
- System on a Chip (SoC)
- C (Programming Language)
- Very-Large-Scale Integration (VLSI)
- Application-Specific Integrated Circuits (ASIC)
- Ic Design
- Design
- IC
Ramesh Bitra Summary
- Ramesh Bitra, based in Hyderabad, IN, is currently a Principal Engineer at SiFive. Ramesh Bitra brings experience from previous roles at SiFive, Qualcomm, Intel Corporation and Soft Machines. Ramesh Bitra holds a 2006 - 2008 M.Tech in Embedded Systems, Systems and control @ Indian Institute of Technology, Bombay. With a robust skill set that includes UVM, System Verilog, Perl Script, I2C, Firmware and more. Ramesh Bitra has 2 emails and 1 mobile phone numbers on RocketReach.
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