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Ram Verma Location
Bengaluru, KA, IN
Ram Verma Work
Senior DFT Engineer @ (October 2017 - Present)
ATE Test Engineer @ (October 2014 - October 2017)
Ram Verma Education
Indian Institute Of Information Technology Allahabad
Master of Technology (M.Tech.) (Microelectronics)
2013
Ram Verma Skills
Tessent
FPGA
mbist
C
Boundary Scan
jtag
SCAN
BIST
Automatic Test Pattern Generation (ATPG)
Tetramax
Static Timing Analysis
VLSI design and fabrication
Integrated Circuit Design
DFT
Ram Verma Summary
Ram Verma, based in Bengaluru, KA, IN, is currently a Senior DFT Engineer at Cientra. Ram Verma brings experience from previous roles at Tessolve Semiconductor PVT LTD (TessolveDTS Inc). Ram Verma holds a Master of Technology (M.Tech.) in Microelectronics @ Indian Institute Of Information Technology Allahabad. With a robust skill set that includes Tessent, FPGA, mbist, C, Boundary Scan and more. Ram Verma has 1 emails on RocketReach.
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