Rakshith Badarinath Email
Silicon Design Engineer 2 @ AMD
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Rakshith Badarinath Location
- Austin, TX, US
Rakshith Badarinath Work
- Silicon Design Engineer 2 @ (December 2025 - Present)
- SRAM Circuit Design Engineer @ (June 2024 - November 2025)
- Associate engineer - DEG layout @ (March 2021 - July 2022)
Rakshith Badarinath Education
- University of Southern California
Master of Science - MS (Electrical Engineering)
2022-2024 - RV-VLSI and Embedded Systems Design Center
Advanced Diploma (ASIC Layout Design - Full Custom)
2020-2021 - Dayananda Sagar College of Engineering, BANGALORE
Bachelor of Technology - BTech (Electrical, Electronics and Communications Engineering)
2016-2020
Rakshith Badarinath Summary
- Rakshith Badarinath, based in Austin, TX, US, is currently a Silicon Design Engineer 2 at AMD. Rakshith Badarinath brings experience from previous roles at Intel Corporation and Micron Technology. Rakshith Badarinath holds a 2022 - 2024 Master of Science - MS in Electrical Engineering @ University of Southern California. Rakshith Badarinath has 1 emails on RocketReach.
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