Rajneesh Sharma's Location
Santa Clara, CA, US
Rajneesh Sharma's Work
- Engineer - VLSI Design @ Silicon Interfaces
- Tranee Engineer @ Tevatron Technologies Pvt. Ltd.
- DFT (Design for Testing) @ VLSI
- EWSD (Electronic Digital Switching System) @ BSNL- NOIDA
Rajneesh Sharma's Education
- Jaypee University of Information Technology
Master of Technology (M.Tech.) (VLSI)
2011 - 2013 - Amity School of Engineering & Technology
Bachelor of Technology (B.Tech) (Electronics and Communications Engineering)
2005 - 2009
Rajneesh Sharma's Skills
- Verilog
- VHDL
- system verilog
- DFT
- Simulations
- Microprocessors
- C
- Hardware
- Embedded Systems
- Digital Electronics
Rajneesh Sharma's Summary
Rajneesh Sharma, based in Santa Clara, CA, US, is currently a Senior Design Engineer at Altran, bringing experience from previous roles at Altran, Mindtree, Silicon Interfaces Pvt Ltd. and Tevatron Technologies Pvt. Ltd.. Rajneesh Sharma holds a 2011 - 2013 Master of Technology (M.Tech.) in VLSI @ Jaypee University of Information Technology. With a robust skill set that includes Verilog, VHDL, system verilog, DFT, Simulations and more, Rajneesh Sharma contributes valuable insights to the industry. Rajneesh Sharma has 2 emails on RocketReach.
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