Rahul Vyas Email

Rahul Vyas Email

Digital Design Engineer | Quantum Computing | UVM | FPGA-SoC | DSP @ Qblox

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Rahul Vyas's Location

Delft, ZH, NL

Rahul Vyas's Work

  • Digital Design Engineer | Quantum Computing | UVM | FPGA-SoC | DSP @ Qblox
  • Design Engineer | FPGA | DSP | Embedded Satellite systems @ AAC Hyperion
  • Design Engineer @ AAC Hyperion
  • Google Summer of Code | Mentor | SoC-FPGA | Video Processing @ Google Digital Garage
  • Intern @ CERN
  • Google Summer of Code | Developer | SoC-FPGA | Video Processing @ Google Digital Garage
  • Digital Design Engineer | SoC-FPGA | Medical Imaging @ Scinvivo B.V.
  • Digital design Engineer - FPGA -Embedded SoC Design (Internet of things) @ CNRS
  • Research Intern (Internet of Things) @ Inria
  • Intern - FPGA (Avionics Systems) | ARINC-429 @ Government of India

Rahul Vyas's Education

  • Technische Universiteit Delft

    Master of Science - MS (Computer Engineering)

    2017 - 2019
  • The LNM Institute of Information Technology

    Bachelor of Technology (BTech) (Electronics and Communications Engineering)

    2012 - 2016

Rahul Vyas's Skills

  • C
  • Embedded Systems
  • VHDL
  • Linux
  • Xilinx
  • Matlab
  • Microcontrollers
  • Digital Signal Processing
  • Arduino
  • SoC

Rahul Vyas's Summary

Rahul Vyas, based in Delft, ZH, NL, is currently a Digital Design Engineer | Quantum Computing | UVM | FPGA-SoC | DSP at Qblox, bringing experience from previous roles at Hyperion Technologies B.V., Google Summer of Code and CERN. Rahul Vyas holds a 2017 - 2019 Master of Science - MS in Computer Engineering @ Technische Universiteit Delft. With a robust skill set that includes C, Embedded Systems, VHDL, Linux, Xilinx and more, Rahul Vyas contributes valuable insights to the industry. Rahul Vyas has 1 email on RocketReach.

Rahul Vyas Email Address

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