Rahul Nair's Location
Styria, Austria
Rahul Nair's Work
- Digital Design Engineer @ NXP Semiconductors Austria
- Engineer - Hardware Development @ Dr.Schenk GmbH
- Research Assistant @ Fraunhofer AISEC
- Master Thesis @ Technische Universität München
- Wissenschaftliche Hilfskraft (Research assistant) @ Technische Universität München
- FPGA Design Engineer @ Quest Global (erstwhile NeST Software)
Rahul Nair's Education
- Technische Universität München
MSc in Communication Engineering (Communication Electronics)
2010 - 2012 - Cochin University of Science and Technology
Bachelor of Technology (BTech) (Electrical, Electronics and Communications Engineering)
2002 - 2006
Rahul Nair's Skills
- VHDL
- Verilog
- ModelSim
- Questasim
- Linux
- Windows
- C
- Matlab
- Xilinx
- Altera Quartus
Rahul Nair's Summary
Rahul Nair, based in Styria, Austria, is currently a Digital Design Engineer at NXP Semiconductors Austria, bringing experience from previous roles at Dr.Schenk GmbH, Fraunhofer AISEC and Technische Universität München. Rahul Nair holds a 2010 - 2012 MSc in Communication Engineering in Communication Electronics @ Technische Universität München. With a robust skill set that includes VHDL, Verilog, ModelSim, Questasim, Linux and more, Rahul Nair contributes valuable insights to the industry. Rahul Nair has 2 emails on RocketReach.
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