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Rahmat Khan Location
Hyderabad, IN
Rahmat Khan Work
2018 -now Lead and Sr . SOC Verification Engineer @
2015 -2018 Sr Technical Analyst @
2011 -2015 Senior Verification Engg @
2007 -2011 Sr. Verification Engg @
Rahmat Khan Education
Bangalore University
BE (ECE)
Bharath institue of higher education and research
M.Tech (VLSI)
St. Xaviers Eng medium high school , ongole
Rahmat Khan Skills
SystemVerilog
ASIC
VLSI
Verilog
Debugging
VHDL
C
System On A Chip Soc
System Verilog
Universal Verification Methodology Uvm
Semiconductors
Design of Experiments
Engineering Management
Industrial Engineering
Cross Functional Team Leadership
JMP
Manufacturing
SPC
Process Engineering
Value Stream Mapping
Lean Manufacturing
Six Sigma
Failure Analysis
Manufacturing Engineering
FMEA
Root Cause Analysis
Statistical Process Control
Failure Mode and Effects Analysis
Program Management
Engineering
Semiconductor Industry
Project Management
Electronics
Microsoft Excel
Scheduling
System Development
Continuous Improvement
Project Planning
System on a Chip
Universal Verification Methodology
Rahmat Khan Summary
Rahmat Khan, based in Hyderabad, IN, is currently a Lead and Sr . SOC Verification Engineer at Intel Corporation. Rahmat Khan brings experience from previous roles at UST Global, Synapse Design Automation Inc. and Infotech Enterprises (TTM INDIA PVT LTD) Hyderabad. Rahmat Khan holds a BE in ECE @ Bangalore University. With a robust skill set that includes SystemVerilog, ASIC, VLSI, Verilog, Debugging and more. Rahmat Khan has 2 emails and 1 mobile phone numbers on RocketReach.
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