Raghu V Email & Phone Number
Principal Member of Technical Staff and Logic design manager @ AMD
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Raghu V Location
- California, United States
Raghu V Work
- 2025 -now Principal Member of Technical Staff and Logic design manager @
- 2024 -2025 Sr. Manager @
- 2021 -2024 SOC Design Engineering Manager @
- 2017 -2021 Logic Design Manager and Micro-architect @
- 2014 -2017 Principal Design Engineer @
- 2012 -2014 Sr. Design Engineer @
- 2009 -2012 Design engineer @ Cosmic Circuits (Acquired by Cadence)
- 2008 -2009 Design Engineer @
- 2007 -2008 Project Intern @
Raghu V Education
- Indian Institute of Technology, Delhi
MTech (VDTT(VLSI Design Tools and Technology))
2006-2008 - Jawaharlal Nehru Technological University
Bachelor of Technology - BTech (Electronics and communications Engineering)
2002-2006 - The Indo English High school
SSC
Raghu V Skills
- System on a Chip (SoC)
- Mixed-Signal IC Design
- Power Delivery
- DDR
- MIPI
- VLSI
- Verilog
- SoC
- ASIC
- Functional Verification
- RTL design
- CMOS
- ModelSim
- Processors
- Analog
- Logic Design
- Mixed Signal
- Logic Synthesis
- Physical Design
- VHDL
- Cadence Virtuoso
- EDA
Raghu V Summary
- Raghu V, based in California, United States, is currently a Principal Member of Technical Staff and Logic design manager at AMD. Raghu V brings experience from previous roles at Synopsys Inc, Intel Corporation and Cadence Design Systems (Formerly Cosmic circuits). Raghu V holds a 2006 - 2008 MTech in VDTT(VLSI Design Tools and Technology) @ Indian Institute of Technology, Delhi. With a robust skill set that includes System on a Chip (SoC), Mixed-Signal IC Design, Power Delivery, DDR, MIPI and more. Raghu V has 3 emails on RocketReach.
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