Pulkit Agarwal's Location
Toronto, ON, CA
Pulkit Agarwal's Work
- SoC Design Engineer @ Intel Corporation
- Graduate Student @ University of Toronto
- Digital Hardware Intern @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
Pulkit Agarwal's Education
- University of Toronto
Master's degree (Computer Engineering)
2017 - 2018 - Netaji Subhas Institute of Technology
Bachelor of Engineering (B.E.) (Electronics and Communications Engineering)
2009 - 2013 - Technische Universität München
Winter School
2012 - 2012
- Indian Institute of Technology, Delhi2011 - 2011
- Oxford Senior Secondary School1995 - 2009
Pulkit Agarwal's Skills
- C++
- Debugging
- C
- Verilog
- Data Structures
- Programming
- Embedded Systems
- Matlab
- SystemVerilog
- AXI
Pulkit Agarwal's Summary
Pulkit Agarwal, based in Toronto, ON, CA, is currently a SoC Design Engineer at Intel Corporation, bringing experience from previous roles at University of Toronto, IDT - Integrated Device Technology, Inc. and Qualcomm. Pulkit Agarwal holds a 2017 - 2018 Master's degree in Computer Engineering @ University of Toronto. With a robust skill set that includes C++, Debugging, C, Verilog, Data Structures and more, Pulkit Agarwal contributes valuable insights to the industry. Pulkit Agarwal has 2 emails and 4 mobile phone numbers on RocketReach.
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