Prashant Arora Email & Phone Number
ASIC Design Engineer @ Matx
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Prashant Arora Location
- San Ramon, CA, US
Prashant Arora Work
- ASIC Design Engineer @ (December 2024 - Present)
- Principal Design Engineer @ (June 2023 - December 2024)
- Principal Engineer @ (August 2022 - May 2023)
- ASIC Architect @ (May 2019 - March 2022)
- Consultant @ (September 2018 - May 2019)
- SoC Design Engineer @ (October 2016 - October 2018)
- Principal Engineer - ASIC Design @ (June 2014 - January 2018)
Prashant Arora Education
- UC Irvine
Master of Science (Computer Science)
1998-2000 - Indian Institute of Technology, Delhi
(Computer Science, Engineering, Computer Science and Engineering)
1994-1998
Prashant Arora Skills
- ASIC
- C
- C++
- Computer Architecture
- Debugging
- Embedded Systems
- Field-Programmable Gate Arrays (FPGA)
- Functional Verification
- H.264
- Hardware Architecture
- Integrated Circuits (IC)
- Neural Networks
- PCI Express
- Perl
- Processors
- Python
- RTL design
- Semiconductors
- SoC
- SystemVerilog
- Universal Verification Methodology (UVM)
- Verilog
- Very-Large-Scale Integration (VLSI)
- Very Large Scale Integration
- Field Programmable Gate Arrays
- Integrated Circuits
- Universal Verification Methodology
Prashant Arora Summary
- Prashant Arora, based in San Ramon, CA, US, is currently a ASIC Design Engineer at MatX. Prashant Arora brings experience from previous roles at NVIDIA, Marvell Technology, quadric.io and Canvas Infotech Inc.. Prashant Arora holds a 1998 - 2000 Master of Science in Computer Science @ UC Irvine. With a robust skill set that includes ASIC, C, C++, Computer Architecture, Debugging and more. Prashant Arora has 1 emails and 1 mobile phone numbers on RocketReach.
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