Prasad Shinde Email & Phone Number
SMTS Silicon Design Engineer @ AMD
5 free lookup(s).
If you need more lookups,
subscriptions start at $34 USD/month.
Prasad Shinde Location
- Santa Clara, CA, US
Prasad Shinde Work
- SMTS Silicon Design Engineer @ (January 2018 - Present)
- Asic Physical Design Engineer @ (September 2012 - December 2017)
- PD @ (September 2011 - August 2012)
- Sr. Member Technical Staff @ (March 2010 - September 2011)
- Senior Physical Design Engineer @ (October 2006 - February 2010)
- Staff Engineer @ Silicon Interfaces (February 2006 - October 2006)
Prasad Shinde Education
- JLPT Administrative Examination
JLPT level 3 (Japanese Language)
2009-2009 - University of Mumbai
B.E. (2004) (Electronics)
2000-2004
Prasad Shinde Skills
- ASIC
- Cadence
- Clock Tree Synthesis
- DRC
- EDA
- Floorplann
- Formal Verification
- IC
- LVS
- Parasitic Extraction
- Physical Design
- Physical Verification
- Power Analysis
- Primetime
- Route
- Routing
- SoC
- Static Timing Analysis
- TCL
- Timing Closure
- VLSI
- Verilog
Prasad Shinde Summary
- Prasad Shinde, based in Santa Clara, CA, US, is currently a SMTS Silicon Design Engineer at AMD. Prasad Shinde brings experience from previous roles at Smartplay Inc, KPIT Cummins Infosystems Limited and MindTree. Prasad Shinde holds a 2009 - 2009 JLPT level 3 in Japanese Language @ JLPT Administrative Examination. With a robust skill set that includes ASIC, Cadence, Clock Tree Synthesis, DRC, EDA and more. Prasad Shinde has 2 emails and 1 mobile phone numbers on RocketReach.
Looking for a different Prasad Shinde?
Find contact details for 700 million professionals.
Top AMD Employees
Lisa Su
Chair and CEO
Austin, TX, US
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co