Pradeep Rajpoot Email
Senior Design Verification Engineer @ Texas Instruments India
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Pradeep Rajpoot Location
- Bengaluru, KA, IN
Pradeep Rajpoot Work
- Senior Design Verification Engineer @ (November 2024 - Present)
- Design Verification Engineer @ (August 2020 - October 2024)
- Trainee @ (December 2019 - August 2020)
Pradeep Rajpoot Education
- Shri Govindram Seksaria Institute of Technology & Science, 23,Park Road, Indore
Master of Technology - MTech (microelctronics and VLSI)
2017-2019 - Sagar Institute of Research & Technology, Opp. Sagar Estates, Ayodhya Nagar, By Pass Road, Bhopal-462041
Bachelor of Engineering - BE (Electronics and Communications Engineering)
2013-2017
Pradeep Rajpoot Skills
- AMBA AHB
- Assertion Based Verification
- C (Programming Language)
- Code Coverage
- Constraint based Randomization
- Functional Verification
- Functional coverage
- G7PHYDDR
- Public Speaking
- Python (Programming Language)
- QuestaSim
- System on a Chip (SoC)
- SystemVerilog
- Teamwork
- UVM
- Ucie
- Universal Verification Methodology (UVM)
- VCS
- verification plan
- xcelium ML
Pradeep Rajpoot Summary
- Pradeep Rajpoot, based in Bengaluru, KA, IN, is currently a Senior Design Verification Engineer at Texas Instruments India. Pradeep Rajpoot brings experience from previous roles at Ambient Scientific and Maven Silicon. Pradeep Rajpoot holds a 2017 - 2019 Master of Technology - MTech in microelctronics and VLSI @ Shri Govindram Seksaria Institute of Technology & Science, 23,Park Road, Indore. With a robust skill set that includes AMBA AHB, Assertion Based Verification, C (Programming Language), Code Coverage, Constraint based Randomization and more. Pradeep Rajpoot has 2 emails on RocketReach.
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