Poorva Kelkar's Location
Mountain View, CA, US
Poorva Kelkar's Work
- Sr CPU Design Verification Engineer @ Google
- Sr CPU Design Verification Engineer @ Google
- Design Verification Engineer @ Apple
- Design Verification Engineer @ Intel Corporation
- Design Verification Engineer @ Altera
- Graduate Technical Intern @ Intel Corporation
- Library Student Assistant @ University of Southern California
- Research Lab Assistant @ University of Southern California
- Student Worker, Electrophysics Department @ University of Southern California
- Production Intern @ Alt Automatation S stem And Secruit S stem
Poorva Kelkar's Education
- University of Southern California
Master's degree (Electrical and Electronics Engineering)
2012 - 2014 - Vidyalankar Institute of Technology
Bachelor of engineering (Electronics and Telecommunication)
2007 - 2011 - WMMV
SSC
1996 - 2005
Poorva Kelkar's Skills
- Verilog
- SystemVerilog
- UVM
- Perl
- Python
- Functional Verification
- Assertion Based Verification
- Code Coverage
- Randomization
- Verdi
Poorva Kelkar's Summary
Poorva Kelkar, based in Mountain View, CA, US, is currently a Sr CPU Design Verification Engineer at Google, bringing experience from previous roles at Google, Apple, Intel Corporation and Altera. Poorva Kelkar holds a 2012 - 2014 Master's degree in Electrical and Electronics Engineering @ University of Southern California. With a robust skill set that includes Verilog, SystemVerilog, UVM, Perl, Python and more, Poorva Kelkar contributes valuable insights to the industry. Poorva Kelkar has 4 emails and 1 mobile phone number on RocketReach.
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