Pooja Shinde Email
System Validation Engineer @ Intel Corporation
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Pooja Shinde Location
- San Jose, CA, US
Pooja Shinde Work
- System Validation Engineer @ (February 2018 - Present)
- System Validation Engineer @ (July 2016 - January 2018)
- Power Efficient Performance Validation Intern @ (February 2015 - August 2015)
Pooja Shinde Education
- California State University-Sacramento 2014-2016
- Pune Institute of Computer Technology 2007-2011
Pooja Shinde Skills
- Matlab
- Python
- Multisim
- Synopsys tools
- Semiconductor Device
- Cadence Spectre
- Embedded Systems
- Cadence Virtuoso Layout Editor
- Computer Architecture
- Verilog
- Perl
- ANSI C
- Basics of Unix
- Cadence
- Digital Circuit Design
- Assembly Language
- Aldec
- Operating Systems
Pooja Shinde Summary
- Pooja Shinde, based in San Jose, CA, US, is currently a System Validation Engineer at Intel Corporation. Pooja Shinde brings experience from previous roles at Intel Corporation. Pooja Shinde holds a 2014 - 2016 California State University-Sacramento. With a robust skill set that includes Matlab, Python, Multisim, Synopsys tools, Semiconductor Device and more. Pooja Shinde has 2 emails on RocketReach.
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