Pooja Saraff's Location
San Jose, CA, US
Pooja Saraff's Work
Pooja Saraff's Education
Pooja Saraff's Skills
Pooja Saraff's Summary
Pooja Saraff, based in San Jose, CA, US, is currently a ASIC Design Verification Engineer, Machine Learning at Google, bringing experience from previous roles at Western Digital, Seagate Technology, LSI Corporation and Intel Corporation. Pooja Saraff holds a 2011 - 2013 MS in Computer Engineering @ UC San Diego. With a robust skill set that includes Verilog, ModelSim, CMOS, Simulations, C++ and more, Pooja Saraff contributes valuable insights to the industry. Pooja Saraff has 3 emails and 1 mobile phone number on RocketReach.