Pooja Kevat Email

Silicon Physical Design Engineer @ Google

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Pooja Kevat Location

Ahmedabad, GJ, IN

Pooja Kevat Work

2025 - now Silicon Physical Design Engineer @ Google
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2024 - 2025 STA EDA Engineer @ IBM
2021 - 2024 Engineer 1 - ASIC Design @ OpenFive
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2020 - 2021 Intern @ OpenFive
2017 - 2017 Graduate Trainee @ JK Lakshmi Cement Ltd.
2016 - 2016 Summer Trainee @ Bharat Sanchar Nigam Limited

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Pooja Kevat Education

NIRMA UNIVERSITY
Master of Technology - MTech (VLSI)
2019 - 2021
Nirma Institute Of Technology
Bachelor of Technology - BTech (Electrical, Electronics and Communications Engineering)
2013 - 2017
shree narayana guru vidyalaya, Ahmedabad, India
Hsc (science)

Pooja Kevat Skills

AutoCAD
Microsoft Word
Layout Verification

Digital Designs
Electronic Circuits
TCL
Integrated Circuits (IC)
Design Rule Checking (DRC)
Place & Route
System on a Chip (SoC)

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Pooja Kevat Summary

Pooja Kevat, based in Ahmedabad, GJ, IN, is currently a Silicon Physical Design Engineer at Google. Pooja Kevat brings experience from previous roles at IBM, OpenFive and JK Lakshmi Cement Ltd.. Pooja Kevat holds a 2019 - 2021 Master of Technology - MTech in VLSI @ NIRMA UNIVERSITY. With a robust skill set that includes AutoCAD, Microsoft Word, Layout Verification, Digital Designs, Electronic Circuits and more. Pooja Kevat has 4 emails on RocketReach.

Pooja Kevat Emails

Found 4 emails

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