Phani N Email
Director, Digital IC Design @ FermionIC Design
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Phani N Location
- Bengaluru, KA, IN
Phani N Work
- 2021 -now Director, Digital IC Design @
- 2020 -2021 Senior Principal Design Engineer @
- 2017 -2020 Principal Design Engineer @
- 2014 -2017 Lead Design Engineer @
- 2014 -2014 Technical Lead @
- 2013 -2014 Senior Design Engineer @
- 2011 -2013 Senior Design Engineer @
- 2008 -2011 Senior Hardware Engineer @
Phani N Education
- Indian Institute of Technology, Kharagpur
M.Tech (Visual Information & Embedded systems)
2006-2008 - SRKR Engineering College
Bachelor of Engineering (B.E.) (Electronics and Communications Engineering)
2002-2006
Phani N Skills
- TCL
- Verilog
- VHDL
- Static Timing Analysis
- VLSI
- Timing Closure
- RTL design
- Functional Verification
- ModelSim
- SoC
- Primetime
- ASIC
- Formal Verification
- ARM
- CMOS
- Debugging
- C
- Design
- Physical Design
- Technology
Phani N Summary
- Phani N, based in Bengaluru, KA, IN, is currently a Director, Digital IC Design at FermionIC Design. Phani N brings experience from previous roles at Cadence Design Systems and Ericsson. Phani N holds a 2006 - 2008 M.Tech in Visual Information & Embedded systems @ Indian Institute of Technology, Kharagpur. With a robust skill set that includes TCL, Verilog, VHDL, Static Timing Analysis, VLSI and more. Phani N has 1 emails on RocketReach.
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