Peter Xia Email
Sr Staff Analog and Mixed-signal Design Engineer @ Synopsys Inc
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Peter Xia Location
- Canada
Peter Xia Work
- 2021 -now Sr Staff Analog and Mixed-signal Design Engineer @
- 2021 -now Power Amplifier Developer @
- 2013 -2021 Senior Researcher @ Emrg Lab University of Waterloo
- 2011 -2013 Research Assistant @ University of Waterloo
- 2010 -2011 Research and Development Engineer @
- 2008 -2010 Hardware Engineer @ Positioning and Wireless Technology Centre
- 2007 -2008 Engineer @ Temasek Laboratory
Peter Xia Education
- University of Waterloo 2012-2013
- Nanyang Technological University
Doctor of Philosophy
2013 - Nanyang Technological University
Bachelor of Engineering (Electronics Engineering)
2004-2008
Peter Xia Skills
- CMOS
- RFIC
- RF Engineering
- DSP
- Power Amplifier Design
- Agilent ADS
- Cadence Virtuoso
- Wireless Networking
- IC Verification
- Matlab/Simulink
- VHDL
- C
- Verilog HDL
- Digital Signal Processors
- SPICE
- Verilog
- Simulink
- IC
- Cadence
Peter Xia Summary
- Peter Xia, based in Canada, is currently a Sr Staff Analog and Mixed-signal Design Engineer at Synopsys Inc. Peter Xia brings experience from previous roles at Ericsson, Emrg Lab University of Waterloo, University of Waterloo and Sony. Peter Xia holds a 2012 - 2013 University of Waterloo. With a robust skill set that includes CMOS, RFIC, RF Engineering, DSP, Power Amplifier Design and more. Peter Xia has 3 emails on RocketReach.
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