Peter Xia Email
Sr Staff Analog and Mixed-signal Design Engineer @ Synopsys Inc
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Peter Xia Location
- Canada
Peter Xia Work
- Sr Staff Analog and Mixed-signal Design Engineer @ (April 2021 - Present)
- Power Amplifier Developer @ (February 2021 - Present)
- Senior Researcher @ Emrg Lab University of Waterloo (May 2013 - February 2021)
- Research Assistant @ University of Waterloo (September 2011 - April 2013)
- Research and Development Engineer @ (July 2010 - September 2011)
- Hardware Engineer @ Positioning and Wireless Technology Centre (May 2008 - June 2010)
- Engineer @ Temasek Laboratory (January 2007 - April 2008)
Peter Xia Education
- University of Waterloo 2012-2013
- Nanyang Technological University
Doctor of Philosophy
2013 - Nanyang Technological University
Bachelor of Engineering (Electronics Engineering)
2004-2008
Peter Xia Skills
- CMOS
- RFIC
- RF Engineering
- DSP
- Power Amplifier Design
- Agilent ADS
- Cadence Virtuoso
- Wireless Networking
- IC Verification
- Matlab/Simulink
- VHDL
- C
- Verilog HDL
- Digital Signal Processors
- SPICE
- Verilog
- Simulink
- IC
- Cadence
Peter Xia Summary
- Peter Xia, based in Canada, is currently a Sr Staff Analog and Mixed-signal Design Engineer at Synopsys Inc. Peter Xia brings experience from previous roles at Ericsson, Emrg Lab University of Waterloo, University of Waterloo and Sony. Peter Xia holds a 2012 - 2013 University of Waterloo. With a robust skill set that includes CMOS, RFIC, RF Engineering, DSP, Power Amplifier Design and more. Peter Xia has 3 emails on RocketReach.
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