Peter Serino Email & Phone Number
Senior PCB Designer, Program Manager @ FREEDOMCAD - Electronic Product Development
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Peter Serino Location
- San Diego, CA, US
Peter Serino Work
- 2013 -now Senior PCB Designer, Program Manager @
- 2004 -2013 Senior Member of Technical Staff (MTS), PCB Designer @ Altera
- 1996 -2003 Senior PCB Designer @
- 1992 -1996 Senior PCB Designer @ Hughes Aircraft/Delco Propulsion Systems
- 1985 -1992 PCB Designer @ Precision Circuits Technology, Inc
Peter Serino Education
- Arizona State University College of Law
Doctor of Jurisprudence (Law)
Peter Serino Skills
- Cadence PCB Editor (Allegro)
- Cadence PCB Router (Specctra)
- Cadence Constraint Manager
- Valor
- High speed interfaces/routing challenges
- High density, double-sided, multi-layer, layer count restricted PCBs
- SMT, BGA, microBGA, blind/buried/micro vias
- PCB design
- Electronics
- Digital Signal Processors
- Integrated Circuit Design
- FPGA
- DFT
- PCIe
- Cadence
- Semiconductors
- Engineering Management
- Analog
- Bga
- Microbga
- Density
- Blind/Buried/Micro Vias
- Layer Count Restricted Pcbs
- High Density
- Cisco
- CAD
- Solutions
- Multi Layer
- Cadence Pcb Router Specctra
- Double Sided
- SMT
- Design
- Services
- Cadence Pcb Editor Allegro
- Cadence Pcb Editor
- Cadence Pcb Router
Peter Serino Summary
- Peter Serino, based in San Diego, CA, US, is currently a Senior PCB Designer, Program Manager at Freedom CAD Services, Inc.. Peter Serino brings experience from previous roles at Altera, Celestica, Hughes Aircraft/Delco Propulsion Systems and Precision Circuits Technology, Inc. Peter Serino holds a Doctor of Jurisprudence in Law @ Arizona State University College of Law. With a robust skill set that includes Cadence PCB Editor (Allegro), Cadence PCB Router (Specctra), Cadence Constraint Manager, Valor, High speed interfaces/routing challenges and more. Peter Serino has 3 emails and 1 mobile phone numbers on RocketReach.
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