Peter Mui Email
Physical Design Engineer @ Intel Corporation
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Peter Mui Location
- San Jose, CA, US
Peter Mui Work
- Physical Design Engineer @ (January 2016 - Present)
- MTS Engineer @ Altera (May 2011 - Present)
- ASIC Design Engineer @ (January 2000 - January 2011)
Peter Mui Education
- Oregon State University
MSEE (Electrical Engineering)
1990-1992
Peter Mui Summary
- Peter Mui, based in San Jose, CA, US, is currently a Physical Design Engineer at Intel Corporation. Peter Mui brings experience from previous roles at Altera and Arrow Electronics - Wyle Electronics. Peter Mui holds a 1990 - 1992 MSEE in Electrical Engineering @ Oregon State University. Peter Mui has 3 emails on RocketReach.
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