Peter Izzo Email & Phone Number
Senior FPGA Engineer @ L3 ForceX
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Peter Izzo Location
- New York, United States
Peter Izzo Work
- 2019 -now Senior FPGA Engineer @
- 2016 -2019 Member of Technical Staff @ Nokia (formerly Alcatel-Lucent)
- 1996 -2015 Member of Technical Staff @
- 1991 -1996 Principle Systems Engineer @ Zycad
- 1989 -1990 Senior Member of Technical Staff @ Supercomputing Solutions, Inc
- 1988 -1989 Senior Member of Technical Staff @
- 1984 -1988 Design Engineer @ Lockheed
Peter Izzo Education
- New Jersey Institute of Technology
MSEE (Electrical Engineering)
1986-1989 - City University of New York-College of Staten Island
Bachelor of Science (B.S.) (Engineering Science)
1980-1984
Peter Izzo Skills
- Altera
- ASIC
- RTL design
- Verilog
- ModelSim
- FPGA
- VHDL
- Wireless
- Xilinx
- Embedded Systems
- Hardware
- System Architecture
- Analog
- Simulations
- Cadence
- Integration
- Static Timing Analysis
- Debugging
- Primetime
- Logic Synthesis
- Perl
- Troubleshooting
- Customer Service
- Testing
- Java
Peter Izzo Summary
- Peter Izzo, based in New York, United States, is currently a Senior FPGA Engineer at L3 Technologies. Peter Izzo brings experience from previous roles at Nokia (formerly Alcatel-Lucent), Alcatel-Lucent, Zycad and Supercomputing Solutions, Inc. Peter Izzo holds a 1986 - 1989 MSEE in Electrical Engineering @ New Jersey Institute of Technology. With a robust skill set that includes Altera, ASIC, RTL design, Verilog, ModelSim and more. Peter Izzo has 2 emails on RocketReach.
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Torrance, CA, US
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Muskegon, MI, US
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Mark Curran
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Charles Barakat
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