Peter Hsueh Location
California, United States
Peter Hsueh Work
- 2019 - now Director, Systems Validation @ Marvell India
- 2017 - 2019 Director, QA @ Aquantia
- 2016 - 2017 Manager, Hardware Engineering @ Dell Technologies Australia and New Zealand
- 2014 - 2016 Consult Hardware Engineer, Test and Validation @ Dell Technologies Australia and New Zealand
- 2012 - 2014 Senior Engineering Manager, Systems and Validation @ Aquantia
- 2008 - 2012 Senior Member of Technical Staff @ Aquantia
- 2007 - 2008 Ethernet Validation Technical Lead @ LSI, an Avago Technologies Company
- 2004 - 2007 Senior Hw Validation Engineer, Physical Layer Ics @ Agere Systems Inc
- 2001 - 2004 Applications Engineer, Physical Layer Ics @ Agere Systems Inc
- 2000 - 2000 Customer Design Engineering Intern @ Adaptec is now Microsemi
Peter Hsueh Education
- University of California - Davis
Bachelor Of Science (Electrical Engineering)
Peter Hsueh Skills
- Test Management
- IC
- Demos
- Debugging
- Analog
- Testing
- SERDES
- Mixed Signal
- PCB design
- Oscilloscope
Peter Hsueh Summary
Peter Hsueh, based in California, United States, is currently a Director, Systems Validation at Marvell Semiconductor. Peter Hsueh brings experience from previous roles at Aquantia and Dell Emc. Peter Hsueh holds a Bachelor Of Science in Electrical Engineering @ University of California - Davis. With a robust skill set that includes Test Management, IC, Demos, Debugging, Analog and more. Peter Hsueh has 2 emails and 1 mobile phone numbers on RocketReach.
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Top Marvell India Employees
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Chris Koopmans
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