Peter Chia Email
Principle ASIC Design Engineer @ SK hynix memory solutions America Inc.
5 free lookup(s).
If you need more lookups,
subscriptions start at $34 USD/month.
Peter Chia Location
- Fremont, CA, US
Peter Chia Work
- Principle ASIC Design Engineer @ (December 2016 - Present)
- Sr. Staff ASIC Design Engineer @ (April 2013 - December 2016)
- Sr Design Engineer @ (September 1999 - April 2013)
Peter Chia Education
- University of Southern California
Master's degree (Electrical and Electronics Engineering)
1998-1999
Peter Chia Summary
- Peter Chia, based in Fremont, CA, US, is currently a Principle ASIC Design Engineer at SK hynix memory solutions America Inc.. Peter Chia brings experience from previous roles at Marvell Semiconductor and VIA Technologies, Inc.. Peter Chia holds a 1998 - 1999 Master's degree in Electrical and Electronics Engineering @ University of Southern California. Peter Chia has 1 emails on RocketReach.
Looking for a different Peter Chia?
Find contact details for 700 million professionals.
Others Named Peter Chia
Peter Chia
Principle ASIC Design Engineer
Fremont, CA, US
Top SK hynix memory solutions America Inc. Employees
Jinfu L.
Principal Engineer
San Jose, CA, US
Wei Zhou
Senior Director Of Engineering
Sunnyvale, CA, US
Rezaul Haque
Director
Folsom, CA, US
Muhammad Abbasi
Sr. Director
San Jose, CA, US
Walter Wang
Head of PMO
San Jose, CA, US
Chun Ho
Sr. Director (SoC Validation and Modeling)
San Mateo, CA, US
Tony Ahwal
Vice President, Programs Office
Santa Cruz, CA, US
Kazuya Shimizu
Director of Design Verification
Santa Clara, CA, US
Hui-Chun Wu
Senior Director
San Jose, CA, US
Dhairya Gala
Firmware Engineer
San Jose, CA, US
Nikunj Kansal
General Manager of Sales
Delhi, India
Jinghai Wang
Director - System Engineering team
San Jose, CA, US
Fan Zhang
Senior Director
San Jose, CA, US
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co