Victoria jubilee Technical Institute (VJTI), Bombay
Masters in Electronnics Engg.
WIEECT
Pervez Bharucha Skills
ASIC
FPGA
SoC
Verilog
VLSI
VHDL
SystemVerilog
Functional Verification
EDA
Integrated Circuit Design
RTL Design
IC
Shell Scripting
Simulation
VCS
ModelSim
UVM
Code Coverage
Unix
TCL
Semiconductors
USB
Veritas Cluster Server
Perl
Program Management
Digital Design
RTL coding
Static Timing Analysis
Red Hat Linux
Gate-level Simulation
Unix Shell Scripting
Simulations
Formal Verification
VMM
AHB
PCI Standards
RVM
Vera
Questa
VLSI Backend Flow
I2C
PERL Script
Functional Coverage
Asynchronous Designs
Field-Programmable Gate Arrays (FPGA)
System on a Chip (SoC)
Very-Large-Scale Integration (VLSI)
Application-Specific Integrated Circuits (ASIC)
Ethernet
Swift
Gate Level Simulation
Hardware
Support
Integrated Circuit
System on a Chip Soc
Very Large Scale Integration Vlsi
Management
CAE
Engineering
Software Development
Code
Gigabit Ethernet
Business Analysis
Testing
Application Specific Integrated Circuits Asic
Strategy
Field Programmable Gate Arrays Fpga
Application Specific Integrated Circuits
Field Programmable Gate Arrays
System on a Chip
Very Large Scale Integration
Pervez Bharucha Summary
Pervez Bharucha, based in Mumbai, MH, IN, is currently a Senior Project Manager at Silicon Interfaces. Pervez Bharucha brings experience from previous roles at Synopsys Inc, Sunnyvale, CA and Xaqti Corporation. Pervez Bharucha holds a Masters in Electronnics Engg. @ Victoria jubilee Technical Institute (VJTI), Bombay. With a robust skill set that includes ASIC, FPGA, SoC, Verilog, VLSI and more.
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