Pendyala Rajeshwar's Location
Orlando, FL, US
Pendyala Rajeshwar's Work
- Technical Lead and Team Manager @ Ericsson
- Consultant, Lead Verification Engineer @ Marvell India
- Senior Design Verification Engineer, Team Lead @ SiCon Design Technologies Pvt. Ltd.
- Member Technical Staff @ Vitesse Semiconductor is now Microsemi
- Design Engineer @ Vitesse Semiconductor is now Microsemi
- Graduate Trainee @ National Remote Sensing Centre, ISRO
Pendyala Rajeshwar's Education
- International Institute of Information Technology
M.Tech (VLSI & Embedded Systems)
2005 - 2007
Pendyala Rajeshwar's Skills
- Primetime
- Ethernet
- RTL coding
- Open Verification
- VLSI
- Mpls Tp
- AMBA AHB
- Sales
- EDA
- System on a Chip Soc
Pendyala Rajeshwar's Summary
Pendyala Rajeshwar, based in Orlando, FL, US, is currently a Senior Member Of Technical Staff at AMD, bringing experience from previous roles at Altran, Ericsson and Marvell Semiconductor. Pendyala Rajeshwar holds a 2005 - 2007 M.Tech in VLSI & Embedded Systems @ International Institute of Information Technology. With a robust skill set that includes Primetime, Ethernet, RTL coding, Open Verification, VLSI and more, Pendyala Rajeshwar contributes valuable insights to the industry. Pendyala Rajeshwar has 2 emails on RocketReach.
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