Pedro Ledoux Email
ASIC Design Verification Engineer @ NXP Semiconductors
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Pedro Ledoux Location
- Caen, FR
Pedro Ledoux Work
- ASIC Design Verification Engineer @ (March 2021 - Present)
- ASIC Design Verification Engineer @ (April 2018 - February 2021)
- Verilog Developer @ (April 2016 - September 2016)
- Internship @ (April 2015 - September 2015)
Pedro Ledoux Education
- CY Cergy Paris Université
Master's degree (Master 2 SIC (Systèmes Intelligents et Communicants) parcours Intelligence Artificielle et Robotique)
2017-2018 - ENSICAEN - Ecole Nationale Supérieure d'Ingénieurs de Caen
Electronic Engineer
2013-2015
Pedro Ledoux Skills
- Arduino
- C
- C (Programming Language)
- CUDA
- Electronics
- Embedded Systems
- FFT
- Field-Programmable Gate Arrays (FPGA)
- Fortran
- Graphics Processing Unit
- Linux
- MIPS Assembly
- MIPS Instruction Set
- Matlab
- OSVVM
- Programming
- Python (Programming Language)
- RISC-V
- Signal Processing
- System Verilog
- SystemVerilog
- UVM
- UVVM
- Universal Verification Methodology (UVM)
- VHDL
- Verilog
- Verilog-AMS
Pedro Ledoux Summary
- Pedro Ledoux, based in Caen, FR, is currently a ASIC Design Verification Engineer at NXP Semiconductors. Pedro Ledoux brings experience from previous roles at Elsys Design, LSI-TEC - LABORATÓRIO DE SISTEMAS INTEGRÁVEIS TECNOLÓGICO and Tokheim. Pedro Ledoux holds a 2017 - 2018 Master's degree in Master 2 SIC (Systèmes Intelligents et Communicants) parcours Intelligence Artificielle et Robotique @ CY Cergy Paris Université. With a robust skill set that includes Arduino, C, C (Programming Language), CUDA, Electronics and more. Pedro Ledoux has 1 emails on RocketReach.
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