Pavithra N Email & Phone Number
Senior Asic Phyiscal Design Engineer
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Pavithra N Location
- Lake Forest, CA, US
Pavithra N Work
- Senior Asic Phyiscal Design Engineer @ SmartPlay Inc. (July 2015 - Present)
- Consultant - Implementation Engineer @ (July 2015 - Present)
- Asic Physical Design Engineer @ SmartPlay Inc. (May 2014 - June 2014)
- Consultant - Implementation Engineer and Lead @ (December 2010 - May 2014)
- Technical Lead @ (October 2010 - May 2014)
- Module Lead @ (January 2008 - September 2010)
- Consultant - Design Engineer @ (March 2006 - February 2009)
- Design Engineer @ (April 2005 - December 2007)
- Engineer - Mixed Signal ASIC @ Future Techno Designs (P) Ltd. (November 2003 - March 2005)
Pavithra N Education
- Dr Ambedkar Institute of Technology
Bachelors in Engineering (Telecommunication)
1999-2003 - M.L.A, 13th Cross Malleshwaram
II PU (PCMB)
1997-1999 - Nirmala Rani High School
S.S.L.C
1987-1997
Pavithra N Skills
- Static Timing Analysis
- Logic Synthesis
- Primetime
- LEC
- RTL Design
- Verilog
- VHDL
- ASIC
- SoC
- Debugging
- NCSim
- ModelSim
- Cadence Virtuoso
- Formal Verification
- RTL coding
- Mixed Signal
- TCL
- System On A Chip Soc
- Application Specific Integrated Circuits Asic
Pavithra N Summary
- Pavithra N, based in Lake Forest, CA, US, is currently a Senior Asic Phyiscal Design Engineer at SmartPlay Inc.. Pavithra N brings experience from previous roles at Qualcomm, SmartPlay Inc., PMC-Sierra and SmartPlay Technologies (I) Pvt. Ltd.. Pavithra N holds a 1999 - 2003 Bachelors in Engineering in Telecommunication @ Dr Ambedkar Institute of Technology. With a robust skill set that includes Static Timing Analysis, Logic Synthesis, Primetime, LEC, RTL Design and more. Pavithra N has 3 emails and 1 mobile phone numbers on RocketReach.
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