Pavan Rao's Location
Lund, SE
Pavan Rao's Work
- Logic Design Engineer @ Intel Corporation
- Graduate Engineer Trainee @ Ansaldo STS A Hitachi Group Company
Pavan Rao's Education
- Vellore Institute of Technology
Master of Technology; 2009 (Digital Communications; 2011)
2009 - 2011 - Vemana I T, Bangalore
B E (Telecommuication)
2004 - 2008
Pavan Rao's Skills
- Perl
- Technology
- Leadership
- Signal Processing
- Veritas Cluster Server
- C++
- System Verilog
- SoC
- Engineering
- Low Power Upf Flows
Pavan Rao's Summary
Pavan Rao, based in Lund, SE, is currently a Senior ASIC Design Engineer at Ericsson, bringing experience from previous roles at Ericsson, Intel Corporation and Ansaldo STS. Pavan Rao holds a 2009 - 2011 Master of Technology; 2009 in Digital Communications; 2011 @ Vellore Institute of Technology. With a robust skill set that includes Perl, Technology, Leadership, Signal Processing, Veritas Cluster Server and more, Pavan Rao contributes valuable insights to the industry. Pavan Rao has 3 emails on RocketReach.
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