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Paul Weil Location
San Jose, CA, US
Paul Weil Work
2016 -now Sr. Principal Product Engineer @
Paul Weil Education
San José State University
MSEE
2003-2006
San José State University
BSEE
2000-2003
Woodside Priory High School
Paul Weil Skills
Analog Circuit Design
Logic Synthesis
RTL design
ASIC
VLSI
Verilog
Formal Verification
Engineering
Strategic Planning
Cpf
TCL
Microsoft Excel
SoC
EDA
Physical Synthesis
Timing Closure
SQL
SystemVerilog
Physical Design
Static Timing Analysis
Low Power Design
Power Analysis
Semiconductors
Paul Weil Summary
Paul Weil, based in San Jose, CA, US, is currently a Sr. Principal Product Engineer at Cadence Design Systems. Paul Weil holds a 2003 - 2006 MSEE @ San José State University. With a robust skill set that includes Analog Circuit Design, Logic Synthesis, RTL design, ASIC, VLSI and more. Paul Weil has 3 emails and 2 mobile phone numbers on RocketReach.
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