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Paul Lai Location
San Jose, CA, US
Paul Lai Work
VP of Digital Design @ (October 2018 - Present)
Senior Director @ (July 2016 - October 2018)
Senior Director @ (August 2012 - July 2016)
Principal Engineer @ (January 2004 - August 2012)
Design Manager @ (January 2000 - January 2004)
Design Engineer @ (January 1994 - January 2000)
Paul Lai Education
University of Rochester
Bachelor of Science (Electrical Engineering)
Carnegie Mellon University
Master of Science (Computer Engineering)
Paul Lai Skills
ASIC
Semiconductors
Verilog
SoC
IC
DFT
Design Rule Checking (DRC)
Layout Versus Schematic (LVS)
Start-ups
Static Timing Analysis
Logic Synthesis
Conformal LEC
Low-power Design
ECO
Paul Lai Summary
Paul Lai, based in San Jose, CA, US, is currently a VP of Digital Design at eTopus Technology. Paul Lai brings experience from previous roles at eTopus Technology, SK hynix memory solutions inc. and LSI Logic. Paul Lai holds a Bachelor of Science in Electrical Engineering @ University of Rochester. With a robust skill set that includes ASIC, Semiconductors, Verilog, SoC, IC and more. Paul Lai has 6 emails and 3 mobile phone numbers on RocketReach.
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