Paul Cheung's Location
Union City, CA, US
Paul Cheung's Work
- Sr. FPGA Design Engineer @ AEye, Inc.
- Sr. FPGA Design Engineer (WinMax Contractor) @ Microsoft Corporation (Mt. View, CA)
- Senior FPGA Design Engineer(ATR Contractor) @ Space Systems Loral
- FPGA Design Engineer @ LG Electronics
- Senior FPGA Design Engineer @ Space Systems Loral
- Senior ASIC Design Engineer @ Greenvity Communications, Inc
- Design Consultant @ Paul Cheung ASIC/FPGA Consulting LLC.
- Sr ASIC Design Engineer @ SIGMA TERMINALS LLP
- Design Manager and Project Lead @ Micron Technology
- Project Manager @ Pericom Semiconductor - Now a part of Diodes Incorporated
Paul Cheung's Education
- The University of Texas at El Paso
MSEE (Electrical Engineering)
Paul Cheung's Skills
- Engineering Management
- Digital Electronics
- Field Programmable Gate Arrays Fpga
- News Production
- System on a Chip Soc
- Debugging
- Logic Synthesis
- Functional Verification
- RTL design
- DFT
Paul Cheung's Summary
Paul Cheung, based in Union City, CA, US, is currently a Sr. FPGA Design Engineer at AEye, Inc., bringing experience from previous roles at Microsoft Corporation (Mt. View, CA), SSL, LG Electronics U.S.A and SSL (Space Systems Loral). Paul Cheung holds a MSEE in Electrical Engineering @ The University of Texas at El Paso. With a robust skill set that includes Engineering Management, Digital Electronics, Field Programmable Gate Arrays Fpga, News Production, System on a Chip Soc and more, Paul Cheung contributes valuable insights to the industry. Paul Cheung has 1 email and 1 mobile phone number on RocketReach.
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