Patrick Tsui Email & Phone Number
Engineering Manager @ Intel Corporation
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Patrick Tsui Location
- San Jose, CA, US
Patrick Tsui Work
- 1997 -now Engineering Manager @
- 1993 -1997 Sr EDA engineer @
Patrick Tsui Education
- Santa Clara University
MSCE,MBA
Patrick Tsui Skills
- ASIC
- Physical Design
- Formal Verification
- Timing
- Silicon
- Silicon Validation
- Product Development
- SoC
- Semiconductors
- Debugging
- Verilog
- EDA
- IC
- RTL design
- InDesign
- Microsoft Word
- Graphic Design
- Photoshop
Patrick Tsui Summary
- Patrick Tsui, based in San Jose, CA, US, is currently a Engineering Manager at Intel. Patrick Tsui brings experience from previous roles at Toshiba America Electronic Components, Inc.. Patrick Tsui holds a MSCE,MBA @ Santa Clara University. With a robust skill set that includes ASIC, Physical Design, Formal Verification, Timing, Silicon and more. Patrick Tsui has 4 emails and 1 mobile phone numbers on RocketReach.
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