Patrick Sheridan Email & Phone Number
Chip Architect @ Google
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Patrick Sheridan Location
- Boulder, CO, US
Patrick Sheridan Work
- 2021 -now Chip Architect @
- 2020 -2021 Research Engineer @
- 2017 -2020 System Architecture Modelling Engineer @
- 2016 -2017 Senior Engineer @
- 2010 -2015 Graduate Student Research Assistant @
- 2009 -2009 Research Assistant @ Configurable Computing Lab @ VT
- 2008 -2008 Co-op Engineer @
- 2007 -2007 Co-op Engineer @ Philip Morris USA
Patrick Sheridan Education
- University of Michigan
Doctor of Philosophy (PhD) (Electrical Engineering)
2010-2015 - University of Michigan
Master of Science (MS) (Electrical Engineering)
2010-2012 - Virginia Tech
BS (SEED, VPI Cave Club, Main Campbell Honors Community)
2005-2009 - Virginia Polytechnic Institute and State University
BS (Mathematics)
2005-2009
Patrick Sheridan Skills
- Hardware Architecture
- Field Programmable Gate Arrays Fpga
- Algorithms
- Pandas Software
- C
- System On A Chip Soc
- Matlab
- Troubleshooting
- SaltStack
- Verilog
- Semiconductor Fabrication
- Engineering
- Characterization
- LaTeX
- Embedded Systems
- Docker
- Testing
- C++
- Python
- Simulations
- Semiconductors
- SystemC
- Research
- Unix
- Data Visualization
- Hardware
- System Architecture
- System on a Chip
- Field Programmable Gate Arrays
- Pandas
Patrick Sheridan Summary
- Patrick Sheridan, based in Boulder, CO, US, is currently a Chip Architect at Google. Patrick Sheridan brings experience from previous roles at Micron Technology, Seagate Technology and University of Michigan. Patrick Sheridan holds a 2010 - 2015 Doctor of Philosophy (PhD) in Electrical Engineering @ University of Michigan. With a robust skill set that includes Hardware Architecture, Field Programmable Gate Arrays Fpga, Algorithms, Pandas Software, C and more. Patrick Sheridan has 4 emails and 1 mobile phone numbers on RocketReach.
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